1. Field of the Invention
The present invention relates to a solid-state image sensor device, and a solid-state image sensor apparatus including the same.
2. Description of the Related Art
An amplifying solid-state image sensor apparatus has been proposed, which includes a solid-state image sensor device having a function of signal amplification in which an amplified photoelectric current is read out by a scanning circuit. Particularly, a CMOS (Complementary Metal Oxide Semiconductor) solid-state image sensor apparatus is known, which includes a solid-state image sensor device and a peripheral driving circuit or a signal processing circuit which include CMOS.
The solid-state image sensor device included in the CMOS solid-state image sensor apparatus needs to include a photoelectric converter, an amplifier, a pixel selector, and the like. Therefore, the CMOS solid-state image sensor apparatus includes several MOS transistors (T) in addition to the photoelectric converter including a photodiode (PD).
FIG. 9 shows a structure of a PD+3T type CMOS solid-state image sensor device 900 (Mabuchi et al., “¼-inch VGA Mode 33K-pixel CMOS Image Sensor”, Technical Reports of the Institute of Image Information and Television Engineers, IPU97-13, March 1997). The solid-state image sensor device 900 includes a photodiode 1, a resetting portion 8 (MOS transistor), an amplifier 3 (MOS transistor), a device selector 4 (MOS transistor), and a signal line 5. A reset clock is indicated by φRST. A device selection clock is indicated by φSEL. A power source potential is indicated by VD.
An operation of the solid-state image sensor device 900 will be described. After the resetting portion 8 performs a resetting operation to reset the photodiode 1 to source power potential VD, a signal charge is generated by incident light hv. Due to the generation of the charge, the source potential of the resetting portion 8 is decreased from VS to VD. The amount of the decrease is proportional to the strength of the incident light and the accumulation time. Therefore, if the accumulation time is constant, the amount of change in the source potential VS is proportional to the strength of the incident light. The change in the source potential VS is amplified by the amplifier 3, and thereafter the change in the source potential VS is selected by the device selection portion 4 and output to the signal line 5.
However, in the solid-state image sensor device 900, the signal is proportional to the strength of the incident light. Therefore, if the incident light is considerably strong, a problem occurs where the dynamic range is narrowed.
To obtain a large dynamic range for the incident light, a method has been proposed in which a photoelectric current is logarithmically compressed and then read out (Japanese National Phase PCT Laid-open Publication No. 7-506932, Japanese Laid-open Publication No. 9-298286, and the like).
FIG. 10 shows a structure of another conventional solid-state image sensor device 1000. Hereinafter, an n-channel pixel is used as the solid-state image sensor device 1000. Note that a case where a p-channel pixel is used as the solid-state image sensor device 1000 can be similarly described. The solid-state image sensor device 1000 includes a photodiode 1, an amplifier 3 (MOS transistor), a device selector 4 (MOS transistor), and a signal line 5. Device selection clock is indicated by φSEL. Power source potential is indicated by VD. A major difference to the solid-state image sensor device 900 is that a MOS transistor 2 is provided which logarithmically converts a photoelectric current Ip of the photodiode 1. The solid-state image sensor device 1000 automatically shifts the photoelectric current Ip so that a source potential VS consistently corresponds to the photoelectric current. In this case, an accumulation operation is not performed, so that a resetting operation is not required.
Hereinafter, an operation of the MOS transistor 2 will be described in detail. FIG. 11 is a diagram used for explaining the potential of the MOS transistor 2 of the conventional solid-state image sensor device 1000. As shown in FIG. 10, the gate potential VG of the MOS transistor 2 is fixed to the power source potential VD. Therefore, the potential of a channel portion of the MOS transistor 2 is a constant value φG(H). When the source potential VS is deeper than φG(H), the MOS transistor 2 performs a weak inversion operation (an operation in a sub-threshold region). In this case, a current ID is a diffusion current Idif flowing from the source end to the drain end of the channel portion under the gate. The amount of charge on the source end and the amount of charge on the drain end are dependent on the difference in potential between the gate and the source (VS−φG) and the difference in potential between the gate and the drain (VD−φG). The current ID is represented by:ID=I0·exp[−q(αVG−VS)/kT]·(1−exp[−q(VD−VS)/kT])  (1)φG=φ0+αVGwhere I0 is a constant, q is an electron charge, k is Boltzmann's constant, and T is an absolute temperature (e.g., C. Mead, “Analog VLSI and Neural Systems”, Addison-Wesley, 1989). Further, α is somewhat less than 1, although α is dependent on the thickness of the gate insulating film and the impurity concentration of the channel. Note that the potential of the substrate is assumed to be at a reference potential (GND).
In formula (1), since q(VD−VS)/kT>>1, (1−exp[−q(αVD−VS)/kT]) can be approximated by one. Therefore, formula (1) can be approximated by:log(ID)=[−q(αVG−VS)/kT]+const.  (2).
Since the gate potential VG of the MOS transistor 2 of the solid-state image sensor device 1000 is the constant value VD, the source potential VS is proportional to log(ID) in accordance with formula (2).
Further, the source potential VS of the MOS transistor 2 changes so that the current ID is equal to the photoelectric current IP, as described below. If IP>ID, the source potential VS is decreased, so that VG−VS of the MOS transistor 2 increases and ID is increased. If IP<ID the source potential VS increases, so that VG−VS of the MOS transistor 2 decreases and ID is decreased. As a result, IP=ID, and the source potential VS is proportional to log(IP). In other words, the source potential VS is a value obtained by logarithmically converting a photoelectric current.
FIG. 12 is a diagram used for explaining the logarithmic-conversion characteristics of a solid-state image sensor device. The horizontal axis indicates αVG−VS, and the vertical axis indicates log(ID). When the MOS transistor 2 performs a weak inversion operation, αVG−VS is proportional to log(ID) where αVG−VS<αVth (threshold potential) (formulas (1) and (2)).
The upper limit of a photoelectric current that can be logarithmically converted (Imax) is obtained when αVG−VS=αVth. The lower limit of a photoelectric current that can be logarithmically converted (Imin) is constrained by the dark current of the photodiode (e.g., Y. P. Tsividis, “Operation and Modeling of the MOS Transistor”, McGraw-Hill, 1988). In this case, since the upper limit Imax is substantially a constant value, the range (dynamic range) of a photoelectric current which can be logarithmically converted is constrained by the dark current of a photodiode.
However, there is the following problem with the solid-state image sensor device 1000. The dark current of a photodiode is significantly dependent on the strength of a field at a junction interface. As the field strength is increased, the dark current is rapidly increased. The field strength at the junction interface is dependent on the gradient of the concentration of the junction interface and the bias voltage applied to the junction interface. Further, in the solid-state image sensor device 1000, a bias voltage VJ of the photodiode is VS.
FIG. 13 shows a relationship between the bias voltage VJ and the dark current Idark of the photodiode. In the solid-state image sensor device 1000, since the bias voltage VJ is VS(H) which is deeper than the potential φG(H) of the channel portion under the gate (FIG. 11), the dark current Idark(H) is a high value (FIG. 13).
When an n-channel pixel is used as the above-described solid-state image sensor device, a structure of the pixel is provided using a typical CMOS production method in such a manner that high-concentration N+ layers 12 and 13 are formed in a well 11 having a relatively high concentration in a p-type low-concentration substrate 10 (FIG. 14). The structure of the pixel of FIG. 14 includes an N-type region 12 of a photodiode, a source or drain region 13 of a MOS transistor, and an oxide film 14 for isolating devices.
When a typical production method is used, the concentration gradient of the junction interface of a photodiode is high. Therefore, the field strength of the junction interface of a photodiode is increased, such that the dark current is further increased.
Hereinafter, functions of the present invention will be described.
According to the present invention, the gate potential of the first MOS transistor for logarithmically converting a photoelectric current output from the photodiode is fixed to a potential between the power source potential and the ground potential. The bias voltage of the photodiode is set to a value lower than that of conventional structures. Since a dark current is dependent on the bias voltage of the photodiode, the dark current can be reduced, and the lower limit of a photoelectric current which can be logarithmically converted is further lowered.
Further, according to the present invention, when the gate potential is sufficiently lower than the power source potential so as to be slightly higher than the threshold potential when the source is ground, the bias voltage of a photodiode is slightly higher than a ground potential GND which is a reference potential. Therefore, a dark current is reduced to a great extent, and the lower limit of a photoelectric current that can be logarithmically converted is further lowered.
It is likely that the voltage level of an output signal which is logarithmically converted is decreased, such that a second MOS transistor falls outside the operation range. In this case, when the second MOS transistor is of a depression type, the input range of the second MOS transistor can be shifted toward a low voltage side, thereby maintaining the operation range.
Further, according to the present invention, at least a portion of the diffusion region constituting the photodiode is provided in a low-impurity-concentration region, so that the concentration gradient of the junction interface can be reduced. Therefore, the field strength of the photodiode is more effectively lowered, thereby making it possible to further reduce dark current.